Phase-responsive circuits

ABSTRACT

This invention relates to a circuit which provides an indication, on a display, of phase changes in signals from a variable phase signal source. The phase of these signals may vary in dependence upon displacement of, for example, a machine slide. The number of clock pulses generated by a clock pulse source between the occurrence of the leading edge of a reference signal and the occurrence of the next leading edge of the variable phase signal gives a measure of the phase relationship between the two signals. Changes in phase between successive cycles of the variable phase signal are detected by a comparator and a detector which cause a number of counting pulses, equal to the difference between the clock pulse counts of the two successive cycles, to be fed to a reversible counter, together with a &#39;&#39;&#39;&#39;Count Up&#39;&#39;&#39;&#39; or a &#39;&#39;&#39;&#39;Count Down&#39;&#39;&#39;&#39; instruction. The number in the counter and in the display gives a measure of the resultant phase shift relative to the phase at the time of setting the counter. The number of clock pulses generated per cycle of the reference signal may be chosen so that the number displayed gives the machine slide displacement directly in inches or metric units.

United States Patent Faulkes et al.

[54] PHASE-RESPONSIVE CIRCUITS [72] Inventors: Kenneth Milford Faulkes;Alan Michael Hayes, both of Bradford,

England [73] Assignee: The English Electrical Company Limited, London,England [22] Filed: Dec. 23, 1969 [21 Appl. No.: 887,584 g [30] ForeignApplication Priority Data Jan. 3, 1969 Great Britain ..462/69 [52] U.S.Cl. ..340/207 P, 324/83 D, 318/608, 235/92 MP, 235/92 PS [51] Int. Cl...G08c 19/16 [58] Field of Search ..307/232, 222; 340/207 P, 347 SY;324/83 D; 235/92 MP, 92 PS, 92 CC; 328/133, 155; 318/601, 608 v [56]References Cited UNITED STATES PATENTS 3,268,713 8/1966 Klinikowski..235/92 MP 3,490,017 1/1970 Kolell et a1. ..235/92 CC 3,500,022 3/1970Toscano ..307/222 FOREIGN PATENTS OR APPLICATIONS 1,158,097 7/1969 GreatBritain ..324/83 D OTHER PUBLICATIONS IBM Technical Disclosure, Vol. 13,No. 7, Dec. 1970,

Horowitz et al., pp. 1867- 1869.

[ Aug. 8, 1972 [57] ABSTRACT This invention relates to a circuit whichprovides an indication, on a display, of phase changes in signals from avariable phase signal source. The phase of these signals may vary independence upon displacement of, for example, a machine slide. Thenumber of clock pulses generated by a clock pulse source between theoccurrence of the leading edge of a reference signal and the occurrenceof the next leading edge of the variable phase signal gives a measure ofthe phase relationship between the two signals. Changes in phase betweensuccessive cycles of the variable phase signal are detected by acomparator and a detector which cause a number of counting pulses, equalto the difference between the clock pulse counts of the two successivecycles, to be fed to a reversible counter, together with a Count Up or aCount Down instruction. The number in the counter and in the displaygives a measure of the resultant phase shift relative to the phase atthe time of setting the counter. The number of clock pulses generatedper cycle of the reference signal may be chosen so that the numberdisplayed gives the machine slide displacement directly in inches ormetric units.

8 Claims, 5 Drawing Figures SOURCE a CLOCK PULSE l I l SOURCE l iREFERENCE SIGNAL MAXIMUM COUNT SOURCE COUNTER L CONTROL VARIABLE PHASESIGNAL SOURCE LATCH PULSE NEW COUNT FORMER STORE PREVIOUS oouNT STORECOMPARATOR IQ ERROR DETECTOR fzs IB\ COUNTING PULSE u FORMER REVERSIBLEDISPLAY COUNTER PATENTED M19 3 1973 I 3 6 8 3 3 4 5 SHEET 1 BF 2 F 1SOURCE 3\ CLOCK PULSE I SOURCE l I V l 1 J l I T REFERENCE SIGNALMAXIMUM COUNT souRcE COUNTER 1 CONTROL I L2 VARlABLE PHASE SIGNAL SOURCELATCH PULSE NEW COUNT FORMER STORE PREVIOUS COUNT STORE COMPARATOR IQERROR DETECTOR I -2s I8\ COUNTING PULSE FORMER |2 REVERSIBLE COUNTER VDISPLAY Applicants Kenneth Milford Faulkes and Alan Michael Hayes By:

Misegades and Douglas Attorneys PATENTEDAUS 8 I972 SHEET 2 BF 2 FIG. 2

This invention relates to phase-responsive circuits.

According to the invention a phase-responsive circuit for indicatingchanges in phase of an input signal includes a source of regularlyspaced pulses, means to detect the number of said pulses generatedbetween the occurrence of a selected point of acycle of a referencesignal and the occurrence of a corresponding point of a concurrent cycleof the input signal, and means responsive to a difference in the numberof pulses detected for successive cycles of the input signal to indicatesaid changes in phase.

Preferably the circuit is arranged to provide, at any instant, anindication of the change in phase of the input signal relative to itsphase at the beginning of a period of operation of the circuit.

The circuit may be used in displacement measuring apparatus in which theinput signal is generated by a phase analogue transducer, the phase ofthe input signal varying in dependence upon the displacement measured.

The means to provide an indication of the resultant phase change maythen indicate the resultant displacement measured during the period.

The indication of displacement may be displayed in one standard ofmeasurement (for example inches) and the indication may be changed toanother standard (for example millimeters) by selection of a differentnumber of pulses per reference cycle. If N pulses are generated for eachcycle of the reference signal for indicating a displacement in inchunits, a repetition rate of, for example, 1.016N or 1.27N pulses percycle will provide an indication in metric units.

One embodiment of the invention will .now be described, by way ofexample, with reference to the accompanying drawings in which FIG. 1 isa schematic block diagram of a circuit in accordance with the invention;and

FIG. 2 is a timing diagram illustrating the operation of the circuit.

Referring now to FIG. 1 of the drawings, a signal from a referencesignal source 1 is fed to a variable phase signal source 2 whichgenerates a signal having the same frequency as the reference signal,but having a variable phase relative to the reference signal. The source2 may, for example, be any kind of phase analogue transducer such as asynchro and may be used to provide a signal the phase of which varies independence upon a quantity (displacement, velocity etc.) which is to bemeasured.

A clock pulse source 3 generates a continuous train of pulses which arefed into a free-running counter 4. The count at which the counter 4resets to zero and starts again is controlled by a maximum count control5. The reference signal from the source 1 is derived from the counter 4and the control 5 such that each cycle of the reference signal iscompleted when the counter 4 resets to 0. In a particular application asdescribed below, the number of pulses in each train may be set at either500 pulses or 508 pulses per cycle of the reference signal.

FIG. 2A of the drawings shows a square wave reference signal whilst FIG.28 represents the output of the clock pulse source 3 comprising 500pulses for each cycle of the reference signal as indicated in FIG. 2C.

FIG. 2D shows the signal from the source 2 and, merely for the sake ofillustration, the first three cycles of this signal are shown as havingrelatively different phases. In practice, the phase of successive cyclesmay not be able to change by such large steps as those illustrated.

At the beginning of each cycle of the reference signal a count of theclock pulses is started. The count reaches 499 and on the next clockpulse resets to 000,

the beginning of a new reference cycle. A latch pulse is fed from alatch pulse former 6 to store the current value of the count in a newcount store 7 each time a positive-going edge of the signal from thesource 2 is detected. Hence, the store 7 contains a count representingthe delay between the leading edge of the reference signal and theleading edge of the variable phase signal.

This count is passed to a previous count store 8 when any change ofphase has been detected. The count in the counter 4 is comparedcontinuously with the previous count in the store 8 by a comparator 9.The latch pulse and the output signal from the comparator 9 are fed toan error or phase change detector 10, which detects any change of phaseof the signal from the source-2. When a phase change occurs, thedetector 10 passes the instruction Count, over a line 23, to a countingpulse former l1 and passes an Up or a Down instruction, indicating therequired direction over a line 18 to a reversible counter 12. Thecounting pulse former 11 is preferably a gating device which is openedor closed by the detector 10 to allow or inhibit the passage of countingpulses from the clock pulse source 3 to the reversible counter 12. Thecounter 12 operates a display 13 to indicate a change in count and hencea change in phase of the variable phase signal. The operation of thedetector 10 and the associated stages is as follows.

Starting at the first leading edge 14 of the reference signal shown inFIG. 2A, clock pulses are fed to the store 7. When the first leadingedge 15 of the variable phase signal occurs, a latch pulse is generatedby the latch pulse former 6 and the current count is stored in the store7. The count in the store 7 would then be 125 as shown in FIG. 2C. If itis assumed that no change of phase has occurred since the previouscycle, the count in the store 8 will also be 125.

It will be assumed that the phase of the variable phase signal has beenretarded for the next cycle and the count will therefore reach a highernumber than 125 before the occurrence of the next leading edge 17 (andhence before the next latch pulse is generated). When the count reaches125, the comparator 9 recognizes the equality of this count and theprevious count in the store 8, and, in the absence of a latch pulse, thedetector 10 generates the instructions Count and Up. The counting pulseformer 11 then gates a clock pulse to the reversible counter 12 for thiscount and for each succeeding count for which the latch pulse is absent.Each pulse, in accordance with the Up instruction, adds I to the digitof least significance in the counter 12 and in the display 13.

When the count in the counter 4 reaches 200, the next leading edge 17 ofthe variable phase signal occurs and a latch pulse is applied to thestore 7 to store the count. By this time counting pulses have been fedto the counter 10 and the number displayed will therefore have increasedby 75.

The detector 10, on receiving the latch pulse, ceases to generate theCount instruction, and no further pulses are gated by the counting pulseformer 11. At the same time the count of 200 passed from the store 7 tothe store 8. For the sake of example, it will be assumed that the phaseof the variable phase signal is advanced for the next cycle. The leadingedge 20 of the variable phase signal, and hence the next latch pulse,then occurs when the new count reaches 175 i.e. before the previouscount of 200.

The latch pulse is therefore fed to the detector 10 before thecomparator 9 indicates equality between the previous count and thecurrent count. In this case the detector 10 generates the instructionsCount and Down for this count and for each succeeding count until thecomparator 9 detects equality between the counts in. the store 8 and thecounter 4, i.e. when the latter count reaches 200. 25 pulses have bythen been passed to the counter 12 and in accordance with the Count andDown instructions the number on the display 13 will have been reduced by25.

The count of 175 in the store 7 then passes to the store 8 and nofurther counting takes place. For the sake of example it will be-assumedthat the phase of the variable phase signal does not change for the nextcycle. The leading edge 22 of the variable phase signal, and hence thenext latch pulse, therefore occurs at the same instant as the comparator9 detects equality between the new and previous counts. No countingpulses are, therefore, fed to the counter 12 and the number displayedtherefore remains unchanged.

If the display 13 is set at or at some other predetermined number at thestart of the operation, the number displayed at any subsequent instantprovides an indication of any shift in the phase of the variable phasesignal at the instant relative to its phase at the start of theoperation.

As an example of a particular application of the circuit, the variablephase signal source 2 may be a synchro attached to the lead screw of amachine tool (not shown) and arranged to provide a signal the phase ofwhich varies linearly with the displacement of a tool slide etc.positioned by the lead screw.

In this example it will be assumed that a phase shift in the range 0 to360 represents a corresponding displacement in the range 0 to 0.05inches. In the above case in which 500 clock pulses are generated ineach cycle of the reference signal, each clock pulse, and hence eachpulse counted in the counter and indicated on the display 13,corresponds to 0.0001 inch displacement and the display therefore givesa direct indication in inch units. Since the indication is incremental,it will at any instant indicate the resultant displacement of the slidewhich has taken place since first setting the display 13.

In the number of clock pulses per cycle of the reference signal ischanged to 508 by the control 5, each clock pulse gated to the counter12 will correspond to a displacement of 2.5 micrometers and the displaycan give a direct indication of the displacement in metric units. Analternative to 508 pulses per reference cycle is 635 pulses perreference cycle. In this case each clock pulse gated to the counter 12,will correspond to a displacement of 2.0 micrometers.

Any number of clock pulses per cycle may be selected depending upon theparticular application of the apparatus, but it will be seen that if Nclock pulses per cycle give a direct indication in inch units, 1.016N

. or 1.27N pulses per cycle will give the indication in metric units.

Although for the sake of illustration the reference and variable phasesignals are shown as square waves, either or both of the signals can bein any other cyclic form such as sine waves. The start and finish of theclock pulse count can then occur, for example, at the points on thereference and variable phase signals respectively, at which the waveform is positive-going and crosses the zero axis. Alternatively anyother cyclically recurring points on both wave forms can be chosen. 1

Similarly, although the reference and variable phase signals and theclock pulses are all shown as positive pulses, any of the signals couldbe negative-going provided that the circuit elements are arranged toaccept the signals.

The circuit can be used in any application in which the input signal isa variable phase signal. Since the counter 12 produces an incrementalcount representing the resultant change in phase during a period, itdoes not need any fixed datum. Hence at the beginning of the period thenumber in the display 13 may be set at any desired value.

We claim l. A phase-responsive circuit for indicating changes I in phaseof a variable phase signal source, comprising a source 1,3,4 ofregularly spaced pulses for producing a reference output signal,

a variable phase signal source 2 responsive to said reference outputsignal of the source for generating a signal having the same frequencyas the source but having a variable phase relative to the referenceoutput signal,

a latch pulse former 6 to detect the number of said regularly spacedpulses from said source generated between the occurrence of a selectedpoint of a cycle of said reference output signal and the occurrence of acorresponding point of a concurrent cycle of the generated signal ofsaid variable phase signal source,

first storage means 7 to store a pulse count of a number of saidregularly spaced pulses detected by said latch pulse former driving acurrently occurring cycle of the generated signal of the variable phasesignal source and thereby producing an output when a change in phase hasbeen detected, second storage means 8 to receive the output of saidfirst storage means,

a comparator 9 responsive to a count of the regularly spaced pulses andthe count of said second storage means,

a means 10 responsive to the latch pulse former and the comparator toindicate changes of phase of the variable signal source.

2. A circuit as claimed in claim 1 in which a counting pulse formermeans 11 is responsive to said means being gated in response to saidmeans to allow or inhibit the passage of said regularly spaced pulsesfrom said source to a load.

3. The circuit as claimed in claim 2 wherein said load is a reversiblecounter. a

4. The circuit as claimed in claim 3 wherein a display 13 in response tothe reversible counter indicates a change in count and hence a change inphase of the variable phase signal source.

5. The circuit as claimed in claim 1 wherein said source includes aclock pulse source 3 and a counter 4, the predetermined number of clockpulses of said clock pulse source being N, and in which saidpredetermined number has either of two values having the ration N to1.016N, or N to 1.27N, so that said difference in the number of pulsesdetected during successive cycles represents the displacement in eitherinch or metric units, respectively.

6. The circuit as claimed in claim 1 wherein said source includes aclock pulse source 3 that generates a continuous train of pulses fed toa free running counter 4.

7. The circuit as claimed in claim 6 wherein said source includes areference signal source 1 responsive to the control of counter 4 and amiximum count control 5 such that each cycle of the reference signal iscompleted when the counter 4 is reset to 0.

8. A circuit as claimed in claim 1 wherein a display is responsive tosaid means to indicate a change in count and a change in phase of thevariable signal source.

1. A phase-responsive circuit for indicating changes in phase of avariable phase signal source, comprising a source 1,3,4 of regularlyspaced pulses for producing a reference output signal, a variable phasesignal source 2 responsive to said reference output signal of the sourcefor generating a signal having the same frequency as the source buthaving a variable phase relative to the reference output signal, a latchpulse former 6 to detect the number of said regularly spaced pulses fromsaid source generated between the occurrence of a selected point of acycle of said reference output signal and the occurrence of acorresponding point of a concurrent cycle of the generated signal ofsaid variable phase signal source, first storage means 7 to store apulse count of a number of said regularly spaced pulses detected by saidlatch pulse former driving a currently occurring cycle of the generatedsignal of the variable phase signal source and thereby producing anoutput when a change in phase has been detected, second storage means 8to receive the output of said first storage means, a comparator 9responsive to a count of the regularly spaced pulses and the count ofsaid second storage means, a means 10 responsive to the latch pulseformer and the comparator to indicate changes of phase of the variablesignal source.
 2. A circuit as claimed in claim 1 in which a countingpulse former means 11 is responsive to said means being gated inresponse to said means to allow or inhibit the passage of said regularlyspaced pulses from said source to a load.
 3. The circuit as claimed inclaim 2 wherein said load is a reversible counter.
 4. The circuit asclaimed in claim 3 wherein a display 13 in response to the reversiblecounter indicates a change in count and hence a change in phase of thevariable phase signal source.
 5. The circuit as claimed in claim 1wherein said source includes a clock pulse source 3 and a counter 4, thepredetermined number of clock pulses of said clock pulse source being N,and in which said predetermined number has either of two values havingthe ration N to 1.016N, or N to 1.27N, so that said differeNce in thenumber of pulses detected during successive cycles represents thedisplacement in either inch or metric units, respectively.
 6. Thecircuit as claimed in claim 1 wherein said source includes a clock pulsesource 3 that generates a continuous train of pulses fed to a freerunning counter
 4. 7. The circuit as claimed in claim 6 wherein saidsource includes a reference signal source 1 responsive to the control ofcounter 4 and a miximum count control 5 such that each cycle of thereference signal is completed when the counter 4 is reset to
 0. 8. Acircuit as claimed in claim 1 wherein a display is responsive to saidmeans to indicate a change in count and a change in phase of thevariable signal source.